The objective of this research is to explore individually addressable high density arrays of specialty diodes (p/n junction, Schottky, Zener, metal-semiconductor-metal and tunnel structures) made from vertical silicon and germanium nanowires grown with the vapor-liquid-solid method. It will study the diode performance and design interaction with the nanowire characteristics while addressing processing challenges. Arrays of such diodes have applications ranging from select devices for crosspoint memories to optical sensing and energy scavenging. The approach is based on bottom-up fabrication of vertical Si, Ge, and Si/Ge heterostructure nanowires grown with in-situ doping. It combines the seed and growth capabilities developed at the Los Alamos National Laboratory Center for Integrated Nanotechnologies with the wafer processing and device modeling, design, and testing expertise at Arizona State University.

The intellectual merits of this work lie in understanding the interactions between the growth process, the resulting physical junction, and the electrical behavior of the diode. Modeling of the transport characteristics of these nanowire diodes will be compared to experimental results such as the current voltage characteristics.

The broader impacts of this research lie in its educational component and the potential value to the electronics industry. The opportunity for the student to work with researchers at the Los Alamos National Laboratory Center for Integrated Nanotechnologies is especially valuable. Since the research is aimed at enabling the early introduction of nanowire devices into mainstream CMOS technology, there is a potentially large impact on an industry which is important to our national competitiveness and to society in general.